The present invention relates to data recovery circuits which recover both the data transmitted and an embedded data clock. More particularly, the present invention can be used to decode received radio frequency (RF) transmissions of the type disclosed and discussed in the two above mentioned patent applications.
Although the present invention has many other applications, the invention was designed to be compatible with and receive data transmissions of the type described in the two above identified patent applications, the disclosures of which are incorporated herein by reference.
Those two applications describe a mobile data acquisition system (MDAS) which can be operated from a vehicle driving on city streets. The MDAS is designed to receive data transmissions from a plurality of encoder/receiver/transmitters (ERT's) which are located on utility meters such as gas meters, water meters and electricity meters, and which transmit data from the meters including the meter reading. As will be understood a large number of data transmissions may take place simultaneously, as many as three or more from each residence the vehicle passes, and since the MDAS must cause the ERT's to transmit, a tone signal will alert a large number of ERT's, not only those ERT's which are immediately adjacent the vehicle.
The system described in the foregoing applications, and particularly the last filed application, provides for each ERT to retransmit its data transmission of ninety-six bits, eight times at pseudo-random frequencies. As disclosed in the prior applications this assures that at least one of the data transmissions from each ERT will be monitored, received, decoded and stored by the MDAS.
It will also be obvious, however, that the bit overhead required to make the transmission of data and to receive the data transmitted is of critical importance to the suitability and acceptability of the system. It is therefore extremely important that the data recovery circuit or data demodulator used in such a system is one that can synchronize and recover the data based on a minimum number of transmitted bits.
As a practical matter it is also important in such a system that a minimum number of components be utilized in the data recovery circuit. It will be understood that a number of these data demodulator circuits must be employed to recover the large number of data transmissions which are occurring. Consequently, each additional component used in such a circuit substantially increases the cost of the MDAS.
Accordingly, it is extremely advantageous to minimize both the bit count required to recover the data as well as the component count used in the data recovery circuit.